CS4365
DSD Normal Mode
DSD Phase
Modulation Mode
Not Used
DSD_SCLK
BCKA
(128Fs)
BCKA
(64Fs)
DSD_SCLK
DSD_SCLK
BCKD
(64Fs)
Not Used
DSDAx,
DSDBx
D0
D0
D1
D1
D1
D2
D2
DSDAx,
DSDBx
Not Used
Figure 18. DSD Phase Modulation Mode Diagram
4.9
4.9.1
Grounding and Power Supply Arrangements
As with any high-resolution converter, the CS4365 requires careful attention to power supply and grounding
arrangements if its potential performance is to be realized. The Typical Connection Diagram shows the rec-
ommended power arrangements, with VA, VD, VLC, and VLS connected to clean supplies. If the ground
planes are split between digital ground and analog ground, the GND pins of the CS4365 should be connect-
ed to the analog ground plane.
All signals, especially clocks, should be kept away from the FILT+ and VQ pins in order to avoid unwanted
coupling into the DAC.
Capacitor Placement
Decoupling capacitors should be placed as close to the DAC as possible, with the low value ceramic ca-
pacitor being the closest. To further minimize impedance, these capacitors should be located on the same
layer as the DAC. If desired, all supply pins with similar voltage ratings may be connected to the same
supply, but a decoupling capacitor should still be placed on each supply pin.
Notes:
All decoupling capacitors should be referenced to ground.
The CDB4365 evaluation board demonstrates the optimum layout and power supply arrangements.
DS670F2
27
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